The Windows Azure platform offers a flexible environment for developers to create cloud applications and services. However the process of creating cloud applications and migrating existing services to the cloud is still a relatively young field. Our project is to create a challenging demo application that is developed in a traditional manner and then attempt to migrate the application to the Windows Azure Platform while documenting the issues and resolutions we encounter in the process.
While there are many note taking and sharing applications, many try to be a Swiss army knife by integrating features such as professor ranking, grades tracking, and course reviews, to name a few. While these features are useful, it contributes to the bloat and learning curve of an application. In the spirit of Google Docs, my team and I set out to see if we could create a more streamlined and intuitve note taking and sharing application for our Software Construction and User Interfaces (Com S 319) course.
Wizbang is a visual code editor developed by Alex Kharbush, Chad Bibler, and myself for our Software Development Practices (COM S 309) course. Many developers are familiar with the concept of an IDE, but many IDEs are too advanced for most grade school children. Wizbang reduces the learning curve of the IDE by allowing children to construct executable programs through drag-n-drop operations using UML style block diagrams. Children can subsequently convert those block diagarms to source code in a procedural language.
As part of my final in Computer Organization and Assembly Level Programming (Cpr E 381) I described a multicycle MIPS CPU in Verilog. I also synthesized it and tested it by writing a Fibonacci calculator and some other arithmetic programs. The MIPS instruction set was chosen because its versatility and simplicity made it a good model of how to implement a CPU and the associated instruction set. By comparing and contrasting the design of a multicycle to a single cycle and pipelined CPU the project was suppose to give me insight into the design tradeoffs invovled in CPU design.